Memory devices are typically provided as internal storage areas in the computer. The term memory identifies data storage that comes in the form of integrated circuit chips. There are several different types of memory used in modern electronics, one common type is RAM (random-access memory). RAM is characteristically found in use as main memory in a computer environment. RAM refers to read and write memory; that is, you can both write data into RAM and read data from RAM. This is in contrast to ROM (read-only memory), which permits you only to read data. Most RAM is volatile, which means that it requires a steady flow of electricity to maintain its contents. As soon as the power is turned off, whatever data was in RAM is lost.
Computers almost always contain a small amount of ROM that holds instructions for starting up the computer. Unlike RAM, ROM generally cannot be written to by a user. An EEPROM (electrically erasable programmable read-only memory) is a special type non-volatile ROM that can be erased by exposing it to an electrical charge. EEPROM comprise a large number of memory cells having electrically isolated gates (floating gates). Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by specialized programming and erase operations, respectively.
Yet another type of non-volatile memory is a Flash memory. A Flash memory is a type of EEPROM that can be erased in blocks instead of one byte at a time. A typical Flash memory comprises a memory array, which includes a large number of memory cells. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The data in a cell is determined by the presence or absence of the charge in the floating gate. The cells are usually grouped into sections called “erase blocks.” The memory cells of a Flash memory array are typically arranged into a “NOR” architecture (each cell directly coupled to a bitline) or a “NAND” architecture (cells coupled into “strings” of cells, such that each cell is coupled indirectly to a bitline and requires activating the other cells of the string for access). Each of the cells within an erase block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation, wherein all floating gate memory cells in the erase block are erased in a single operation.
Both RAM and ROM memory devices have memory cells that are typically arranged in an array of rows and columns. During operation, a row (page) is accessed and then memory cells can be randomly accessed on the page by providing column addresses. This access mode is referred to as page mode access. To read or write to multiple column locations on a page requires the external application of multiple column addresses. To increase access time, a burst mode access has been implemented. The burst mode uses an internal column address counter circuit to generate additional column addresses. The address counter begins at an externally provided address and advances in response to an external clock signal or a column address strobe signal.
Many memory devices, in particular Flash memory devices, are utilized with specialized software handling and/or memory management routines, generally referred to as “drivers.” The drivers are executed on the “host,” typically a processor or memory controller, and allow the memory device(s) being utilized to be read from and written to by the host. In many systems the drivers also provide a layer of logical abstraction for the host. This is particularly the case with Flash memory devices, presenting the Flash memory device as a freely re-writeable general access memory device or mass storage device, such as a hardrive, a floppy disk, or other non-volatile machine-usable storage device. The drivers, as part of the Flash memory device hardware abstraction, typically also manage the Flash memory devices utilizing internal management routines; scheduling erase blocks to be erased, managing bad erase blocks, protecting and unprotecting erase blocks, and load leveling the Flash memory device.
The driver and/or memory management routines are generally supplied by the memory manufacturer to the end-user or device manufacturer. These driver routines are typically supplied in a source code format or as a linkable library and as such must be compiled into the operating system or overall code executing on the device. Self contained and separately loadable drivers are also possible, but are typically not utilized in embedded processor devices.
The software routines and drivers that operate computer-based devices are often collectively referred to as firmware or ROM after the non-volatile ROM machine-usable storage device that such routines have historically been stored in. It is noted that such firmware or ROM routines are stored on a variety of machine-usable storage mediums or firmware storage mediums that include, but are not limited to, a non-volatile Flash memory, a ROM, an EEPROM, a one time programmable (OTP) device, a complex programmable logic device (CPLD), an application specific integrated circuit (ASIC), a magnetic media disk, etc.
A problem with computer-based or embedded processor systems is the multiple differing memory devices that may be potentially utilized with these devices over their lifetimes of use, or even within a production run of a device. These memory devices may differ from memory manufacturer to memory manufacturer, or from part to part; even if the memory has similar electrical connections or interfaces. As a result, the driver and management software generally differs for each differing type of memory device the manufacturer incorporates into their system. This is particularly the case for Flash memory devices, where a specialized driver is needed to interface with and properly operate the Flash memory. In addition, many Flash memory devices are formatted to resemble mass storage devices, such as magnetic disks, and are not utilized as a general access memory. These specialized Flash memory drivers allows the system to read, erase, program, and manage the erase blocks of a Flash memory device and can be unique to the Flash memory device or manufacturer. In many cases, because the Flash memory device cannot be accessed without use of the Flash memory driver, the driver software is stored on another non-volatile machine-usable medium (such as a Boot ROM or a magnetic disk) and is loaded at system initialization.
As these memory device drivers are typically compiled or loaded into the operating system or application routine (herein operating system) that operates the computer based system, the manufacturers must produce, test, and maintain multiple versions of their operating system software with differing drivers to support all the possible memory devices utilized with the system. This can lead to problems in maintaining these systems or devices, as the end user or service personnel must often update the software of the system when a memory device is updated or replaced, or be aware of the types of memory devices in the system when the system software itself is updated. If they do not correctly match the software to the memory device being utilized the system may be rendered inoperable.
One other way in which this problem of supporting multiple differing memory types has been solved in the past has been by compiling multiple different drivers into the operating system. This allows the operating system to drive any likely memory device of a set likely to be utilized. Unfortunately, the operating system will typically not automatically select the appropriate driver and must be hand configured to use appropriate driver for the memory device being utilized. Additionally, the resulting software, containing multiple separate driver routines, is typically much larger than a single driver executable and thus is not suitable for many embedded devices where resources and non-volatile (boot ROM) storage space is limited. Further, in many of these multiple driver cases the drivers are implemented in a generic and inefficient manner, so as to apply to as many memories types as possible; trading operating efficiency for wider applicability and a smaller code size.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative methods of detecting and driving different memory devices in computer based systems and, in particular, Flash memory devices.